vreg_and_chip_reset.h
1 // THIS HEADER FILE IS AUTOMATICALLY GENERATED -- DO NOT EDIT
2 
3 /*
4  * Copyright (c) 2021 Raspberry Pi (Trading) Ltd.
5  *
6  * SPDX-License-Identifier: BSD-3-Clause
7  */
8 
9 #ifndef _HARDWARE_STRUCTS_VREG_AND_CHIP_RESET_H
10 #define _HARDWARE_STRUCTS_VREG_AND_CHIP_RESET_H
11 
13 #include "hardware/regs/vreg_and_chip_reset.h"
14 
15 // Reference to datasheet: https://datasheets.raspberrypi.com/rp2040/rp2040-datasheet.pdf#tab-registerlist_vreg_and_chip_reset
16 //
17 // The _REG_ macro is intended to help make the register navigable in your IDE (for example, using the "Go to Definition" feature)
18 // _REG_(x) will link to the corresponding register in hardware/regs/vreg_and_chip_reset.h.
19 //
20 // Bit-field descriptions are of the form:
21 // BITMASK [BITRANGE]: FIELDNAME (RESETVALUE): DESCRIPTION
22 
23 typedef struct {
24  _REG_(VREG_AND_CHIP_RESET_VREG_OFFSET) // VREG_AND_CHIP_RESET_VREG
25  // Voltage regulator control and status
26  // 0x00001000 [12] : ROK (0): regulation status
27  // 0x000000f0 [7:4] : VSEL (0xb): output voltage select
28  // 0x00000002 [1] : HIZ (0): high impedance mode select
29  // 0x00000001 [0] : EN (1): enable
30  io_rw_32 vreg;
31 
32  _REG_(VREG_AND_CHIP_RESET_BOD_OFFSET) // VREG_AND_CHIP_RESET_BOD
33  // brown-out detection control
34  // 0x000000f0 [7:4] : VSEL (0x9): threshold select
35  // 0x00000001 [0] : EN (1): enable
36  io_rw_32 bod;
37 
38  _REG_(VREG_AND_CHIP_RESET_CHIP_RESET_OFFSET) // VREG_AND_CHIP_RESET_CHIP_RESET
39  // Chip reset control and status
40  // 0x01000000 [24] : PSM_RESTART_FLAG (0): This is set by psm_restart from the debugger
41  // 0x00100000 [20] : HAD_PSM_RESTART (0): Last reset was from the debug port
42  // 0x00010000 [16] : HAD_RUN (0): Last reset was from the RUN pin
43  // 0x00000100 [8] : HAD_POR (0): Last reset was from the power-on reset or brown-out detection blocks
44  io_rw_32 chip_reset;
46 
47 #define vreg_and_chip_reset_hw ((vreg_and_chip_reset_hw_t *)VREG_AND_CHIP_RESET_BASE)
48 
49 #endif
Definition: vreg_and_chip_reset.h:23