7 #ifndef _HARDWARE_PWM_H 8 #define _HARDWARE_PWM_H 11 #include "hardware/structs/pwm.h" 12 #include "hardware/regs/dreq.h" 19 #ifndef PARAM_ASSERTIONS_ENABLED_PWM 20 #define PARAM_ASSERTIONS_ENABLED_PWM 0 69 static inline void check_slice_num_param(__unused uint slice_num) {
70 valid_params_if(PWM, slice_num < NUM_PWM_SLICES);
79 valid_params_if(PWM, gpio < NUM_BANK0_GPIOS);
80 return (gpio >> 1u) & 7u;
91 valid_params_if(PWM, gpio < NUM_BANK0_GPIOS);
105 c->csr = (c->csr & ~PWM_CH0_CSR_PH_CORRECT_BITS)
106 | (bool_to_bit(phase_correct) << PWM_CH0_CSR_PH_CORRECT_LSB);
120 valid_params_if(PWM, div >= 1.f && div < 256.f);
121 c->div = (uint32_t)(div * (
float)(1u << PWM_CH0_DIV_INT_LSB));
136 valid_params_if(PWM, integer >= 1);
137 valid_params_if(PWM, fract < 16);
138 c->div = (((uint)integer) << PWM_CH0_DIV_INT_LSB) | (((uint)fract) << PWM_CH0_DIV_FRAC_LSB);
152 valid_params_if(PWM, div >= 1 && div < 256);
171 c->csr = (c->csr & ~PWM_CH0_CSR_DIVMODE_BITS)
172 | (((uint)mode) << PWM_CH0_CSR_DIVMODE_LSB);
183 c->csr = (c->csr & ~(PWM_CH0_CSR_A_INV_BITS | PWM_CH0_CSR_B_INV_BITS))
184 | ((bool_to_bit(a) << PWM_CH0_CSR_A_INV_LSB) | (bool_to_bit(b) << PWM_CH0_CSR_B_INV_LSB));
211 check_slice_num_param(slice_num);
212 pwm_hw->slice[slice_num].csr = 0;
214 pwm_hw->slice[slice_num].ctr = PWM_CH0_CTR_RESET;
215 pwm_hw->slice[slice_num].cc = PWM_CH0_CC_RESET;
216 pwm_hw->slice[slice_num].top = c->top;
217 pwm_hw->slice[slice_num].div = c->div;
218 pwm_hw->slice[slice_num].csr = c->csr | (bool_to_bit(start) << PWM_CH0_CSR_EN_LSB);
255 check_slice_num_param(slice_num);
256 pwm_hw->slice[slice_num].top = wrap;
275 check_slice_num_param(slice_num);
277 &pwm_hw->slice[slice_num].cc,
278 ((uint)level) << (chan ? PWM_CH0_CC_B_LSB : PWM_CH0_CC_A_LSB),
279 chan ? PWM_CH0_CC_B_BITS : PWM_CH0_CC_A_BITS
299 check_slice_num_param(slice_num);
300 pwm_hw->slice[slice_num].cc = (((uint)level_b) << PWM_CH0_CC_B_LSB) | (((uint)level_a) << PWM_CH0_CC_A_LSB);
322 valid_params_if(PWM, gpio < NUM_BANK0_GPIOS);
335 check_slice_num_param(slice_num);
336 return (uint16_t)(pwm_hw->slice[slice_num].ctr);
349 check_slice_num_param(slice_num);
350 pwm_hw->slice[slice_num].ctr = c;
363 check_slice_num_param(slice_num);
364 hw_set_bits(&pwm_hw->slice[slice_num].csr, PWM_CH0_CSR_PH_ADV_BITS);
365 while (pwm_hw->slice[slice_num].csr & PWM_CH0_CSR_PH_ADV_BITS) {
380 check_slice_num_param(slice_num);
381 hw_set_bits(&pwm_hw->slice[slice_num].csr, PWM_CH0_CSR_PH_RET_BITS);
382 while (pwm_hw->slice[slice_num].csr & PWM_CH0_CSR_PH_RET_BITS) {
397 check_slice_num_param(slice_num);
398 valid_params_if(PWM, integer >= 1);
399 valid_params_if(PWM, fract < 16);
400 pwm_hw->slice[slice_num].div = (((uint)integer) << PWM_CH0_DIV_INT_LSB) | (((uint)fract) << PWM_CH0_DIV_FRAC_LSB);
412 check_slice_num_param(slice_num);
413 valid_params_if(PWM, divider >= 1.f && divider < 256.f);
414 uint8_t i = (uint8_t)divider;
415 uint8_t f = (uint8_t)((divider - i) * (0x01 << 4));
427 check_slice_num_param(slice_num);
428 hw_write_masked(&pwm_hw->slice[slice_num].csr, bool_to_bit(a) << PWM_CH0_CSR_A_INV_LSB | bool_to_bit(b) << PWM_CH0_CSR_B_INV_LSB,
429 PWM_CH0_CSR_A_INV_BITS | PWM_CH0_CSR_B_INV_BITS);
440 check_slice_num_param(slice_num);
445 hw_write_masked(&pwm_hw->slice[slice_num].csr, ((uint)mode) << PWM_CH0_CSR_DIVMODE_LSB, PWM_CH0_CSR_DIVMODE_BITS);
458 check_slice_num_param(slice_num);
459 hw_write_masked(&pwm_hw->slice[slice_num].csr, bool_to_bit(phase_correct) << PWM_CH0_CSR_PH_CORRECT_LSB, PWM_CH0_CSR_PH_CORRECT_BITS);
489 check_slice_num_param(slice_num);
490 hw_write_masked(&pwm_hw->slice[slice_num].csr, bool_to_bit(enabled) << PWM_CH0_CSR_EN_LSB, PWM_CH0_CSR_EN_BITS);
511 check_slice_num_param(slice_num);
528 valid_params_if(PWM, slice_mask < 256);
542 pwm_hw->intr = 1u << slice_num;
560 pwm_hw->intf = 1u << slice_num;
569 static_assert(DREQ_PWM_WRAP1 == DREQ_PWM_WRAP0 + 1,
"");
570 static_assert(DREQ_PWM_WRAP7 == DREQ_PWM_WRAP0 + 7,
"");
571 check_slice_num_param(slice_num);
572 return DREQ_PWM_WRAP0 + slice_num;
static void pwm_set_clkdiv_mode(uint slice_num, enum pwm_clkdiv_mode mode)
Set PWM divider mode.
Definition: pwm.h:439
static pwm_config pwm_get_default_config(void)
Get a set of default values for PWM configurationPWM config is free-running at system clock speed...
Definition: pwm.h:229
static uint16_t pwm_get_counter(uint slice_num)
Get PWM counterGet current value of PWM counter.
Definition: pwm.h:334
static void pwm_set_both_levels(uint slice_num, uint16_t level_a, uint16_t level_b)
Set PWM counter compare valuesSet the value of the PWM counter compare values, A and B...
Definition: pwm.h:298
Fractional divider advances with each rising edge of the PWM B pin.
Definition: pwm.h:53
static void pwm_set_clkdiv(uint slice_num, float divider)
Set PWM clock dividerSet the clock divider. Counter increment will be on sysclock divided by this val...
Definition: pwm.h:411
static void pwm_config_set_output_polarity(pwm_config *c, bool a, bool b)
Set output polarity in a PWM configuration.
Definition: pwm.h:182
Free-running counting at rate dictated by fractional divider.
Definition: pwm.h:51
static __force_inline void hw_write_masked(io_rw_32 *addr, uint32_t values, uint32_t write_mask)
Set new values for a sub-set of the bits in a HW registerSets destination bits to values specified in...
Definition: address_mapped.h:157
static uint pwm_gpio_to_slice_num(uint gpio)
Determine the PWM slice that is attached to the specified GPIO.
Definition: pwm.h:78
static void pwm_set_irq_mask_enabled(uint32_t slice_mask, bool enabled)
Enable multiple PWM instance interruptsUse this to enable multiple PWM interrupts at once...
Definition: pwm.h:527
static void pwm_config_set_clkdiv_mode(pwm_config *c, enum pwm_clkdiv_mode mode)
Set PWM counting mode in a PWM configuration.
Definition: pwm.h:166
static uint pwm_gpio_to_channel(uint gpio)
Determine the PWM channel that is attached to the specified GPIO.Each slice 0 to 7 has two channels...
Definition: pwm.h:90
static void pwm_set_output_polarity(uint slice_num, bool a, bool b)
Set PWM output polarity.
Definition: pwm.h:426
static void pwm_config_set_clkdiv_int(pwm_config *c, uint div)
Set PWM clock divider in a PWM configuration.
Definition: pwm.h:151
static void pwm_set_clkdiv_int_frac(uint slice_num, uint8_t integer, uint8_t fract)
Set PWM clock divider using an 8:4 fractional valueSet the clock divider. Counter increment will be o...
Definition: pwm.h:396
static void pwm_set_irq_enabled(uint slice_num, bool enabled)
Enable PWM instance interruptUsed to enable a single PWM instance interrupt.
Definition: pwm.h:510
static void pwm_advance_count(uint slice_num)
Advance PWM countAdvance the phase of a running the counter by 1 count.
Definition: pwm.h:362
static uint pwm_get_dreq(uint slice_num)
Return the DREQ to use for pacing transfers to a particular PWM slice.
Definition: pwm.h:568
static __force_inline void hw_set_bits(io_rw_32 *addr, uint32_t mask)
Atomically set the specified bits to 1 in a HW register.
Definition: address_mapped.h:121
static void pwm_config_set_wrap(pwm_config *c, uint16_t wrap)
Set PWM counter wrap value in a PWM configurationSet the highest value the counter will reach before ...
Definition: pwm.h:195
static void pwm_set_counter(uint slice_num, uint16_t c)
Set PWM counterSet the value of the PWM counter.
Definition: pwm.h:348
static void pwm_clear_irq(uint slice_num)
Clear a single PWM channel interrupt.
Definition: pwm.h:541
static void pwm_set_enabled(uint slice_num, bool enabled)
Enable/Disable PWMWhen a PWM is disabled, it halts its counter, and the output pins are left high or ...
Definition: pwm.h:488
static uint32_t pwm_get_irq_status_mask(void)
Get PWM interrupt status, raw.
Definition: pwm.h:550
static void pwm_set_wrap(uint slice_num, uint16_t wrap)
Set the current PWM counter wrap valueSet the highest value the counter will reach before returning t...
Definition: pwm.h:254
static void pwm_set_mask_enabled(uint32_t mask)
Enable/Disable multiple PWM slices simultaneously.
Definition: pwm.h:498
static void pwm_set_chan_level(uint slice_num, uint chan, uint16_t level)
Set the current PWM counter compare value for one channelSet the value of the PWM counter compare val...
Definition: pwm.h:274
pwm_clkdiv_mode
PWM Divider mode settings.
Definition: pwm.h:49
static void pwm_retard_count(uint slice_num)
Retard PWM countRetard the phase of a running counter by 1 count.
Definition: pwm.h:379
static void pwm_set_phase_correct(uint slice_num, bool phase_correct)
Set PWM phase correct on/off.
Definition: pwm.h:457
static void pwm_init(uint slice_num, pwm_config *c, bool start)
Initialise a PWM with settings from a configuration objectUse the pwm_get_default_config() function t...
Definition: pwm.h:210
static void pwm_config_set_phase_correct(pwm_config *c, bool phase_correct)
Set phase correction in a PWM configuration.
Definition: pwm.h:104
Fractional divider advances with each falling edge of the PWM B pin.
Definition: pwm.h:54
static void pwm_config_set_clkdiv_int_frac(pwm_config *c, uint8_t integer, uint8_t fract)
Set PWM clock divider in a PWM configuration using an 8:4 fractional value.
Definition: pwm.h:135
static void pwm_config_set_clkdiv(pwm_config *c, float div)
Set PWM clock divider in a PWM configuration.
Definition: pwm.h:119
static void pwm_force_irq(uint slice_num)
Force PWM interrupt.
Definition: pwm.h:559
static __force_inline void hw_clear_bits(io_rw_32 *addr, uint32_t mask)
Atomically clear the specified bits to 0 in a HW register.
Definition: address_mapped.h:131
static void pwm_set_gpio_level(uint gpio, uint16_t level)
Helper function to set the PWM level for the slice and channel associated with a GPIO.Look up the correct slice (0 to 7) and channel (A or B) for a given GPIO, and update the corresponding counter compare field.
Definition: pwm.h:321
Fractional divider is gated by the PWM B pin.
Definition: pwm.h:52